OVS=X16, TXDELAY=NONE
Control Register
| SYNC | USART Synchronous Mode |
| LOOPBK | Loopback Enable |
| CCEN | Collision Check Enable |
| MPM | Multi-Processor Mode |
| MPAB | Multi-Processor Address-Bit |
| OVS | Oversampling 0 (X16): Regular UART mode with 16X oversampling in asynchronous mode 1 (X8): Double speed with 8X oversampling in asynchronous mode 2 (X6): 6X oversampling in asynchronous mode 3 (X4): Quadruple speed with 4X oversampling in asynchronous mode |
| CLKPOL | Clock Polarity |
| CLKPHA | Clock Edge For Setup/Sample |
| MSBF | Most Significant Bit First |
| CSMA | Action On Slave-Select In Master Mode |
| TXBIL | TX Buffer Interrupt Level |
| RXINV | Receiver Input Invert |
| TXINV | Transmitter output Invert |
| CSINV | Chip Select Invert |
| AUTOCS | Automatic Chip Select |
| AUTOTRI | Automatic TX Tristate |
| SCMODE | SmartCard Mode |
| SCRETRANS | SmartCard Retransmit |
| SKIPPERRF | Skip Parity Error Frames |
| BIT8DV | Bit 8 Default Value |
| ERRSDMA | Halt DMA On Error |
| ERRSRX | Disable RX On Error |
| ERRSTX | Disable TX On Error |
| SSSEARLY | Synchronous Slave Setup Early |
| TXDELAY | TX Delay Transmission 0 (NONE): Frames are transmitted immediately 1 (SINGLE): Transmission of new frames are delayed by a single baud period 2 (DOUBLE): Transmission of new frames are delayed by two baud periods 3 (TRIPLE): Transmission of new frames are delayed by three baud periods |
| BYTESWAP | Byteswap In Double Accesses |
| AUTOTX | Always Transmit When RX Not Full |
| MVDIS | Majority Vote Disable |
| SMSDELAY | Synchronous Master Sample Delay |